'Tis the Season to Win
Start Your Holiday Season With a Chance to Win an
DE10-Nano Kit From Terasic
DE10-Nano Dev Kit built with the Intel® Cyclone V SoC FPGA combines dual-core ARM Cortex®-A9 processor with industry-leading programmable logic for ultimate design flexibility. Features include 1GB DDR3 SDRAM, 8-channel, 12-bit, 500 ksps ADC, Gigabit Ethernet PHY with RJ45 connector. With an HDMI output, 2x 40-pin expansion headers, and an Arduino UNO R3 compatible header gives developers expansion options for a number of applications such as medical, automotive, industrial, and military. Enter for your chance to win the Terasic DE10-Nano Dev Kit valued at $170. Winners selected on 1/31/23.
Entry Frequency: 1 x daily per person/email
End Date: January 31st, 2023
Eligibility: Open to the U.S. & Canada
Discover how the Oclea vision components can give you a head start in developing your products.

Teknique have created the Oclea Universal Evaluation Kit as an all-in-one solution for developers looking for a head start in evaluating and developing Ambarella-based smart camera products. The result of Teknique’s long experience developing computer vision products, the EVK includes everything developers need to to jumpstart vision system product development and simplifies development of camera and Edge AI products using Oclea™ SoMs. The EVK includes hardware, SDK, source code examples and development support, and provides a simple and effective hardware debugging environment in an easy to use A5 form factor. The EVK will be among the Oclea products Teknique will be showing at Ambarella’s suite at CES in January, along with its latest SoMs and reference designs. 
Multiple Stream Intel® FPGA NVMe Storage IP
Design Gateway extends its family of high-performance Nonvolatile Memory Express (NVMe) IP cores for Intel® Agilex™ Field Programmable Gate Arrays (FPGA) with the introduction of the Multiple User NVMe (muNVMe) IP. The muNVMe host controller IP enables up to four concurrent write/read data streams to independently share a single PCIe Gen 4 NVMe SSD without the requirement of processor.
The muNVMe IP core integrates with the Agilex™ FPGA’s P-Tile PCIe Gen 4 Root Port reducing the logic to less than 12,000 ALMs and the on-FPGA memory buffers are configurable per data stream between 256K or 1M byte, eliminating the cost and complexity of external DDR memory. By efficiently sharing the data bandwidth of a single NVMe SSD, design complexity and system costs are further reduced. Utilizing the Design Gateway muNVMe host controller IP core as part of a system design has low implementation risk since it has been verified in Intel® Agilex™ FPGAs.  

Key Features
  • Up to 4 concurrent data streams to a single NVMe PCIe Gen4 SSD with no CPU needed
  • Selectable on-FPGA memory buffer sizes of 256KB or 1MB requiring no external DDR memory
  • Low FPGA resources utilization, less than 12,000 ALMs
  • Optimally sharing the NVMe SSD’s bandwidth to maximize performance and reduce costs
  • IP proven on Intel FPGAs and reference designs demonstratable on Intel® Agilex-F development kits

Target Applications
  • 5G/6G Communications
  • Medical Imaging
  • Broadcast Video
New Groundbreaking Intel© FPGA Families Are Coming!  
Based on Intel© 7 technology, these families leap to the forefront of the FPGA space for low power, footprint and performance. All from U.S. ON SHORE FABS with lead times anticipated to be a fraction of today’s classic semiconductor lead times!
Contact Macnica to see if you qualify for advanced information, and significant software and IP discounts.
Macnica - Empowering Efficient Innovation
About Macnica Americas
Macnica Americas, Inc. is the North America division of Macnica Fuji Electronics Holdings, Inc., a $6B global leader in technology product distribution, technical support, and design services.
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