Every component has a timing (.tmg) file to automate timing margin calculations, and the files are pre-configured in our Design Kits. Learn how to use this robust feature for DDR4/5 and more in our new QSI Timing video series.

This video and doc explain how to configure SiSoft’s Advanced SerDes template model to match your device specs and CTLE curves. Read about how Intel did it in this award-winning DesignCon paper.

This video series and Kit illustrate how to use QSI’s “Widebus” feature. Crosstalk, AMI, STAT mode, and complex equalization bring advanced features to QSI and DDR4/5 analysis.

Our Design Kit includes MathWorks SerDes AMI models, families of calibration/reference channels, and compliance masks. See the associated videos for details.

Check out our mini-series on the subtle side of SI as we explore Engineering Judgment, Working With Layout, Managing Simulators & Models, and ask the question “When Should I Simulate?”

QCD seamlessly interfaces with the IEEE COM MATLAB script. Three videos demonstrate how to derive your channel’s COM value inside or outside the QCD GUI. For those without MATLAB, QCD’s integrated COM-like metric is also shown.