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Get ready, EMC 2016 is almost here!  In this issue, we are giving you a sneak peek of our Best Paper Finalists!  Plus, we have added some fun videos of things to see and do in Ottawa.

The EMC 2016 Final Program and Mobile App are set to be released soon, so watch for more details in the coming weeks!

NOMINEES FOR BEST ELECTROMAGNETIC COMPATIBILITY (EMC) PAPER

  • Surface Charging Simulations of an Orion-like Spacecraft in a Geosynchronous Space Plasma
  • Extension of the IEC 61000-4-20 Annex C to the Use of Arbitrary Transient Signals
  • Sensitivity Analysis of Cable Crosstalk to Uncertain Parameters Using Stochastic Reduced Order Models
  • A 90 dB PSRR, 4 dBm EMI Resistant, NMOS-Only Voltage Reference using Zero-VT Active Loads
  • Fuzzy Based Risk Analysis for IT-System and Their Infrastructure
  • On the Adequacy of Standardized Lightning Current Waveform for Composite Structures for Aircraft and Wind Turbine Blades
  • Canonical Statistical Model for Maximum Expected Immission of Wire Conductor in an Aperture Enclosure

    NOMINEES FOR BEST SIGNAL AND POWER INTERGRITY (SIPI) PAPER

  • Cost-Effective Characterization of Dissipative Loss of Printed Circuit Board Traces
  • SNEM: Full S-Parameter Synthesis From Near-End Measurement
  • Variability Analysis of Crosstalk among Pairs of Differential Vias Using the Polynomial-Chaos and the Design of Experiments Methods
  • Extraction of the Parameters of the Coupling Capacitance Hysteresis Cycle for TSV Transient Modeling

  • EMI Control Performance of the Absorbing Material for Application on Flexible Cables
  • A Fast Surface Method to Model Skin Effect in Transmission Lines with Conductors of Arbitrary Shape or Rough Profile
  • Estimating the Near Field Coupling from SMPS Circuits to a Nearby Antenna Using Dipole Moments
  • Extension of the IEC 61000-4-20 Annex C to the Use of Arbitrary Transient Signals
  • A 90 dB PSRR, 4 dBm EMI Resistant, NMOS-Only Voltage Reference Using Zero-VT active loads
  • Modeling Optimization of Test Patterns Used in De-embedding Method for Through Silicon Via (TSV) Pair in Silicon Interposer
  • Top-layer Interconnect Inductance Extraction for the Pre-layout Power Integrity Using the Physics-based Model Size Reduction (PMSR) Method
  • A New Method to Calculate Phase Center Locations for Arbitrary Antenna Systems and Scenarios
  • Variability Analysis of Crosstalk Among Pairs of Differential Vias Using the Polynomial-Chaos and the Design of Experiments Methods
  • Sub-THz Interconnect Channel for Planar Chip-to-Chip Communication

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